The present invention relates to non-volatile memory devices and, more particularly, to a method of operating a non-volatile memory device, in which a read voltage can be controlled according to the characteristics of a cell.
Flash memory such as non-volatile memory is generally classified into NAND flash memory and NOR flash memory. NOR flash memory has a structure in which memory cells are independently connected to bit lines and word lines and therefore exhibits an excellent random access time characteristic, NAND flash memory has a structure in which a plurality of memory cells is connected in series, requiring only one contact per cell string, and therefore exhibits an excellent integration characteristic. Accordingly, the NAND structure is generally used in high-integrated flash memory.
A typical NAND flash memory device includes a memory cell array, a row decoder, and a page buffer. The memory cell array is comprised of a plurality of word lines extending along rows, a plurality of bit lines extending along columns, and a plurality of cell strings corresponding to the bit lines.
In recent years, in order to further improve the level of integration of flash memory, active research has been done on a multi-bit cell that stores plural data in one memory cell. This type of memory cell is generally called a multi-level cell (MLC). A memory cell of a single bit is called a single level cell (SLC).
The flash memory may function improperly due to changed characteristics after operating for a long period of time.
FIG. 1 is a diagram showing threshold voltage distributions of a flash memory device.
Referring to FIG. 1, if memory cells of a flash memory device are programmed by a program operation, the threshold voltage of the memory cells is changed, resulting in a first threshold voltage distribution 110.
As program and erase operations are repeatedly performed on the memory cells, a degree that the memory cells programmed to have the first threshold voltage distribution 110 are programmed is varied. Consequently, the first threshold voltage distribution 110 of the memory cells can be changed to a second threshold voltage distribution 120.
A read voltage VR for reading data stored in the memory cells is previously set and not changed. When the memory cells are programmed to have the first threshold voltage distribution 110, there is no error in reading the data using the read voltage VR.
However, if the threshold voltage distribution of the memory cells is changed to the second threshold voltage distribution 120, an error occurs in reading the data using the read voltage VR. That is, memory cells in a region Pe of the second threshold voltage distribution 120 have to be recognized as an actually programmed state. However, since the threshold voltage distribution has been changed, the memory cells in the region Pe are recognized as being not programmed with respect to the read voltage VR. Accordingly, the likelihood of error increases in read data.